Hybrid High-Q MEMS resonator based on SOI Technology for High Performance Oscillators
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MIcro-Machined Filters in Multi-layer TechnoloGy for Satellite ON-Board Communication Systems
The 0-level packaging approach (also called Wafer Level Packaging) can be divided into chip-capping and thin film capping. The first one is based on silicon or quartz wafers processed to obtain a cap structure which is then bonded to the MEMS wafer, the later one is based on the processes of the planar technology which protect only the mechanical structures. Both approaches are currently studied.
The main research activity performed by the group in the last years was the development of a technology for the fabrication of RF-MEM switches, which started in 2003 within the ESA/ESTEC contract Nr. 14628/NL/CK-“MEM Switch”. This type of technology, and the following improvements are now the basis of all our activities in the field of the RF MEMS. The outcome of the original research project was a 8 mask fabrication process, that provides polysilicon lines and resistors, metal lines, two levels of electroplated gold and a level of evaporated gold.